With the rapid advancement of advanced information-oriented society in recent years, there is a strong demand for the enhancement of throughput capacity of information processing apparatus, i.e., the speeding up. In addition, their miniaturization and weight saving are required so as to be portable.
Of these requirements, in order to achieve the speeding up of the information processing, it is effective to make the interconnected wiring of passive parts and active parts such as LSI, memory and so as short as possible so as to make wiring density high. This technique is also effective for the miniaturization and weight saving.
Printed wiring boards by which the width and pitch (line and space; L/S) of wiring are make small to make the high-density assembly of electronic parts such as LSI chips possible have heretofore been known as high-density assembly boards. In this case, in order to make the great reduction of the wiring pitch (L/S) possible, it is necessary to form minute interlayer-connecting via holes having a diameter of at most 200 μm, which is far smaller than those used in production techniques for general printed wiring boards.
It is difficult to form the interlayer-connecting via holes at most 200 μm in diameter by the drilling used in the formation of via holes in the conventional printed boards. It is hence necessary to use photolithography in which photosensitivity is imparted to an insulating material to conduct ultraviolet exposure, or etching by a laser. Therefore, as properties required of the insulating material, it is important to permit easily imparting photosensitivity and heightening the aspect ratio (thickness of an insulating film/connection via diameter) of via holes by the photolithography or etching by a laser to easily form minute via holes.
An insulating material used in an interlayer insulating film of a high-density board is particularly required to have high heat resistance that can withstand heat generated by high-density assembly and high-density mounting processes of electronic parts, and low water absorption property for ensuring insulation reliability in a narrow wiring pitch and a thin insulating layer. In addition, since speeding up and the use of high frequency are required in the field in which these high-density assembly boards are used, it is desirable for the insulating material to have excellent dielectric properties such as low dielectric constant and low dielectric loss tangent.
As the insulating material for the interlayer insulating film, it has heretofore been disclosed in, for example, “Method for Forming Minute Pattern of Photosensitive polyimide and Application thereof to MCM Use; Collection of Lecture Papers in Seventh Science Lecture Meeting of Society of Printed Circuit Board, pp. 39–40” to use polyimide to which photosensitivity has been imparted. However, the photosensitive polyimide is excellent in heat resistance and dielectric properties, but the bottom of its film is hard to cure upon ultraviolet exposure, and so it has involved a problem that the wall surface of a via hole formed therein is easy to swell by development. Even when non-photosensitive polyimide is processed by a laser, there has been a problem that the formation of a minute via hole is difficult by reason of too high absorption of laser or difficulty of being decomposed. In addition, since the polyimide resin has a high water absorptivity, its dielectric properties are greatly deteriorated, and insulation reliability is lowered by moisture absorption in high-temperature and high-humidity conditions in particular. Further, the polyimide resin undergoes bubbling of water in the resin under high-temperature conditions in solder mount or the like. Such bubbling has formed the cause of blister and cracking and hence become a great problem.
For example, Japanese Patent Application Laid-Open Nos. 170070/1995, 41167/1996 and 148837/1996 disclose a technique in which a material obtained by imparting photosensitivity to such a bisphenol A type epoxy resin as used in general printed wiring boards is used. However, this photosensitive epoxy resin has been subjected to acryl modification for the purpose of imparting the photosensitivity and hence has involved a problem that the dielectric properties of the resulting board are greatly deteriorated. In addition, the photosensitive epoxy resin has also involved the same problem as in the photosensitive polyimide as to the formation of the via hole and a problem that smear tends to occur even in the case of the laser processing by heat curing.
Japanese Patent Application Laid-Open Nos. 181458/1996 and 236943/1996 disclose a technique in which a bismaleimide.triazine resin (BT resin) or thermosetting type poly(phenylene ether) (PPE) resin is used as an interlayer insulating material. Both resins are excellent in heat resistance and dielectric properties but have involved a problem that the formation of a via hole is difficult, since it is difficult to impart photosensitivity to the resins. In the case of the bismaleimide.triazine resin in particular, there has been a problem that insulation reliability is lowered in an accelerated durability test at high temperature and high humidity because of its high water absorptivity, and so the resin is poor in durability.
By the way, a thermoplastic norbornene resin which is a cycloolefin resin is known to be a material having excellent dielectric properties and low water absorption property and exhibit excellent electrical properties when it is used in a printed wiring board. For example, Japanese Patent Application Laid-Open No. 29191/1987 discloses a process for producing a circuit board by impregnating a glass cloth with a thermoplastic norbornene resin obtained by addition copolymerization of a norbornene monomer and ethylene and then curing the resin with a peroxide, while Japanese Patent Application Laid-Open No. 27412/1987 discloses a method in which an epoxy group-containing thermoplastic norbornene resin obtained by graft-reacting an addition copolymer of ethylene and a norbornene monomer with allyl glycidyl ether is used as an insulating material. However, these process and method have involved a problem that the glass transition temperature of each resin is low, and its heat resistance is insufficient, because the content of the norbornene monomer unit is low, and so an interlayer insulating film undergoes deformation or softening upon high-density packaging of semiconductor parts, and yield of the packaging is lowered.
As described above, any insulating material satisfying all the required properties of the ability to form minute via holes, high heat resistance, low water absorption property and excellent dielectric properties has heretofore not been proposed.
In the requirements of high-density assembly of an electronic circuit and speeding up of a digital circuit, said both circuits being used in computers and information communication, a high-density region which cannot be accommodated by the conventional plated through-hole multi-layer board produced from a double-sided copper-clad laminate is required in a field of printed wiring boards used in these circuits.
Therefore, attention has been paid to a build-up process in which an interlayer-connecting via hole is formed in each wiring layer to successively connect wiring layers. The build-up process includes a photo type using a photosensitive insulating material and a laser type using a thermosetting insulating material. It has heretofore been mainly conducted to successively laminate layers while applying a varnish with any of these insulating materials dissolved in a solvent to a substrate, curing the varnish, forming via holes and forming a wiring pattern.
However, a process in which a curable resin such as an epoxy resin used in the above-described photosensitive or thermosetting insulating material is formed into a film in advance, and the film is laminated on a substrate in a tack-free and semi-cured dry film state (B-stage state) has been already put to practical use in recent years for the purpose of simplifying such complicated processes as described above and enhancing handling property.
However, the conventional dry film can simplify the process in the lamination on the substrate compared with the coating of the solution, but has involved a problem that a process for forming the film is complicated for reasons of semi-curing a liquid epoxy monomer in advance to form the tack-free film, and after all the dry film is not related to the simplification of the whole process. In addition, such a dry film of the semi-cured state tends to be affected by temperature, light and the like and it is hence necessary to take care to store or handle the film.
Further, in the field of printed wiring boards of electronic apparatus used in computers and information communication, it is of urgent necessity to establish a build-up laminating process capable of forming wiring (wiring pitch, interlayer-connecting via holes) of high density in a region which has been impossible of achievement by the conventional plated through-hole method by drilling. A process in which a build-up multi-layer laminate is produced while applying a thermosetting poly(phenylene ether) resin excellent in heat resistance, low moisture absorption property and dielectric properties and the like to a copper foil and heat-setting the resin by heating and pressing has heretofore been disclosed in Japanese Patent Application Laid-Open No. 1728/1997. However, the resistance to chemicals such as acids and alkalis of the thermosetting poly(phenylene ether) resin is not sufficient though it is excellent. Therefore, the surface of an insulating layer is slightly dissolved upon etching of the copper foil or a chemical treatment for removal of smear after the formation of interlayer-connecting via holes in the production of the build-up laminate, so that the anchor effect of a rough surface is too lowered to sufficiently ensure adhesion property to a plating layer and adhesion property between the insulating layers. There has hence been a problem that reliability as a laminated board is greatly lowered. In order to solve this problem, a surface roughening treatment must be conducted again before the formation of the plating layer, and so the process becomes complicated. Accordingly, it has heretofore been difficult to provide a build-up multi-layer laminate which can be produced by a simple process and has sufficient reliability even when a material satisfying the requirements of high heat resistance and low dielectric properties is used.